bit-synchronous

基本解释

This paper discusses the advantages of PLD (programmable logical device) in designing a digital circuit,and at the same time,discusses how to realize a 6 bit synchronous up/down counter with clear by using PLD GAL16V8.
介绍了PLD器件在设计数字电路时的优越性，同时叙述了以PLD器件GAL16V8实现六位可清零、可置数的同步可逆计数器的原理。
Taking PCM/DPSK for example, the effects by Doppler velocity during the course of bit synchronization and demodulation are analyzed.
并以PCM/DPSK信号为例, 分析了多普勒频率对位同步及解调过程的影响。
For receiving data correctly , another important problem of TDM system is how to realize bit synchronizing and frame synchronizing .
为了正确的接收数据,时分复用系统需要解决的另一重要技术就是位同步和帧同步的问题。
He bit off a large piece of the apple.
他咬下一大块苹果。
She was a bit queer after her husband deserted her.
她遭丈夫遗弃後精神有点失常。