logic gate level

基本解释

• [计算机科学技术]逻辑门级逻辑闸级

英汉例句

双语例句

• Using gate level modeling might not be a good idea for any level of logic design.
  使用门级建模对于任何逻辑设计都不是一个好的设计。
• Level restoration pass-transistor logic is proposed for low speed cell while dynamic transmission gate logic for high speed cell.
  低速单元采用带有电平恢复的传输管逻辑实现，高速单元采用动态传输门逻辑实现。
• The pre-functional cell of standard buffered FET logic (BFL) adopted by the gate array possesses nine logic functions, two different kinds of driving capabilities, and the level control ability.
  此门阵列采用的BFL预功能级标准逻辑单元，具有九种组合逻辑功能及两种不同选择的驱动能力，并具有输出电平调节功能。

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词组短语

短语

• low level logic gate 低电平逻辑门电路
• Gate Level logic Design 闸口逻辑设计
• gate level logic simulation [计]门级逻辑模拟;闸位准逻辑仿真

• logic gate level更多词组

专业释义

计算机科学技术

• 逻辑门级
• 逻辑闸级