phase locked loop

基本解释

This paper gives an analysis of parasitic frequency deviation in the digital phase locked loop, which is one of the important specifications of modern communication systems.
本文分析了数字锁相环路的寄生频偏，它是现代通讯系统中频率合成器的重要指标之一。
Phase locked loop connected with phase PID control is applied in the middle loop in order to acquire good dynamic process and strong anti disturbance performance as well as high precision.
中环引入与相位PID控制相结合的锁相环路，保证了系统在达到高稳态精度的同时具有好的动态特性和强的抗干扰能力。
Direct synthesizing and phase locked loop are combined to implement the synthesizer. Ultra-light and double shock proof and high efficiency switching power supply are used in the synthesizer.
该合成器采用了直接合成与数字锁相相结合的方法，并采用了超轻型、双重隔振技术和高效率开关电源。